The present invention relates to a memory access tracing method and, more specifically, to a method for identifying a processor accessing shared memory in a multiprocessor system.
Memory access tracing is one of the methods used to design and tune hardware such as caches, memory controllers and interconnects between CPUs, and one of the methods used to design and tune software such as virtual machines, operating systems and applications. Memory access tracing usually probes signals on the memory bus, and records its command, address, and data.
In a shared-memory multiprocessor such as a non-uniform memory access (NUMA) system, memory access tracing can be performed by monitoring the signals between a CPU and its local memory (DIMM), and recording them.
In order to analyze the behaviors of hardware and software with greater precision, memory access traces should preferably have the information on which CPU performs a particular memory access. For example, in a NUMA system, identification of the CPU generating the access to the local or remote memory is required.
The address and read/write information flows on a memory bus, but the information used to identify which CPU is making the access does not. Therefore, the CPU making an access cannot be identified using conventional memory access tracing. As a result, a probe has to be connected to an interconnect (CI) between CPUs to monitor the flow of read/write packets. However, having to monitor all interconnects between CPUs in order to identify the CPUs making the particular memory access requires a significant amount of electronic and mechanical effort. In addition, because local memory accesses do not appear on the interconnects between CPUs, the CPU making the access cannot be identified by simply monitoring the interconnects.